Compute — In development
AxV-ECM
AMD × Versal Edge Computing Module, built on the Versal™ AI Edge Series Gen 2 adaptive SoC. Arm application and real-time cores, AIE-ML v2 AI Engines and programmable logic on one device — deterministic control, sensor front-end processing and AI inference in a single module, with a radiation-tolerant XQR path for the harshest orbits.
Status In development. Device parameters are taken from AMD's Versal™ AI Edge Series Gen 2 product documentation and refer to the largest devices in the family; the AxV-ECM device selection, module-level specifications and I/O break-out will be published as the design matures.
Scalar and real-time compute
- Up to 8× Arm Cortex-A78AE application cores, lock-step capable
- Up to 10× Arm Cortex-R52 real-time cores for deterministic control
- Up to 10× the scalar performance of first-generation Versal
- DDR5 / LPDDR5x with ECC; 2 MB on-chip memory with ECC
- ASIL D / SIL 3 targeted on the scalar processors
Next-generation AI Engines
- Up to 144 AIE-ML v2 tiles — 184 INT8 dense / 369 sparse TOPS
- MX6, MX9, FP8 and FP16 data types for efficient inference
- Up to 3× TOPS per watt versus the previous generation
- Pre-processing, inference and post-processing on one chip
- Video codec unit, GPU and ISP for imaging payloads
Programmable logic
- 500K+ LUTs and 2,000+ DSP58 engines
- Sensor front ends in fabric: MIPI, JESD, SpaceWire, custom LVDS
- PCIe Gen5, 10 GbE, USB 3.2 and UFS 3.1 hard interfaces
- Unlimited on-orbit reconfiguration (XQR devices)
- Same 2U ECM enclosure, copper core and rad-hard supervisor as the NxA
Inside the module
Arm cores, AI Engines and fabric on one card.
The Versal package sits at the centre of each compute card beside its NVMe drives, with the programmable-logic I/O routed to the lockable front plate. The copper core underneath pulls heat to the enclosure; the rad-hard supervisor sits between the cards.
Hardware features
- AMD Versal AI Edge Series Gen 2 adaptive SoC (commercial, XQ or space-grade XQR)
- Programmable-logic I/O to the front plate for direct sensor and bus interfaces
- PCIe Gen5 to the second card or an NxA/NxN module; 10 GbE for cluster networking
- Dual NVMe storage per card; DDR5 with ECC
- Single- or dual-card configurations; mixed Versal + NxA cards for FPGA front end plus GPU back end
- Radiation-tolerant XQR option: AMD class B flow, -55 °C to +125 °C, TID and SEE characterized
Software features
- ECM-OS on the Cortex-A78AE cluster with RAID, resilient filesystems and checkpointing
- Real-time partition on the Cortex-R52 cores for flight-critical control
- AMD Vitis AI and AIE-ML v2 toolchains; ONNX model deployment
- In-orbit OTA updates of software and FPGA bitstreams via Aether
- Kubernetes clustering with NxA/NxN modules for heterogeneous data centers
Device options
Commercial or space grade.
The same module design accepts the commercial / defense-grade Versal AI Edge Gen 2 devices or the radiation-tolerant XQR variants, trading cost against environment.
| Specification | XQ / commercialDefense & industrial grade | XQRSpace grade, class B |
|---|---|---|
| Qualification | Industrial / defense grade | AMD class B manufacturing, qualification and burn-in |
| Temperature | -40 °C to +125 °C (Tj) | Full M-temp: -55 °C to +125 °C |
| Radiation | System-level hardening by Aethero | Radiation tolerant: TID and SEE characterized, SEL-immune design rules, EDAC on-chip memories |
| Reconfiguration | Field reprogrammable | Unlimited on-orbit reprogramming |
| Package | Organic BGA | Ruggedized organic package, mask-set control |
| Best for | LEO, short missions, cost-sensitive constellations | GEO, cislunar, deep space and long-life missions |
FAQ
Common questions
Why an adaptive SoC alongside the NVIDIA ECMs?
Will the AxV-ECM fit the same envelope as the NxA-ECM?
Is the XQR variant drop-in compatible?
When will engineering samples be available?
Contact
Interested in the AxV-ECM?
Tell us about your mission, workload mix and radiation environment and we will keep you updated on engineering samples, specifications and qualification milestones.